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s d g parameter typ. max. units r jc junction-to-case CCC 5.3 r ja case-to-ambient (pcb mount)** CCC 50 c/w r ja junction-to-ambient CCC 110 thermal resistance v dss = 55v r ds(on) = 0.14 ? i d = 10a
10/01/10 www.irf.com 1 logic-level gate drive surface mount (irlr024n) straight lead (irlu024n) advanced process technology fast switching fully avalanche rated lead-free fifth generation hexfets from international rectifier utilizeadvanced processing techniques to achieve the lowest possible on-resistance per silicon area. this benefit, combined with the fast switching speed and ruggedized device design that hexfet power mosfets are well known for, provides the designer with an extremely efficient device for use in a wide variety of applications. the d-pak is designed for surface mounting using vapor phase, infrared, or wave soldering techniques. the straight lead version (irfu series) is for through-hole mounting applications. power dissipation levels up to 1.5 watts are possible in typical surface mount applications.

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%&'(( parameter max. units i d @ t c = 25c continuous drain current, v gs @ 10v 10 i d @ t c = 100c continuous drain current, v gs @ 10v 7.1 a i dm pulsed drain current 40 p d @t c = 25c power dissipation 28 w linear derating factor 0.2 w/c v gs gate-to-source voltage 16 v e as single pulse avalanche energy 35 mj i ar avalanche current 6.0 a e ar repetitive avalanche energy 2.8 mj dv/dt peak diode recovery dv/dt 5.0 v/ns t j operating junction and -55 to + 175 t stg storage temperature range soldering temperature, for 10 seconds 300 (1.6mm from case ) c
d-pak irlr014npbf i-pak IRLU014NPBF downloaded from: http:///

2 www.irf.com s d g parameter min. typ. max. units conditions i s continuous source current mosfet symbol (body diode) CCC CCC showing the i sm pulsed source current integral reverse (body diode) CCC CCC p-n junction diode. v sd diode forward voltage CCC CCC 1.3 v t j = 25c, i s = 6a, v gs = 0v t rr reverse recovery time CCC 37 56 ns t j = 25c, i f = 6a q rr reverse recoverycharge CCC 48 71 nc di/dt = 100a/s t on forward turn-on time intrinsic turn-on time is negligible (turn-on is dominated by l s +l d ) source-drain ratings and characteristics 10 40 & starting t j = 25c, l = 1.96mh r g = 25 ? , i as = 6a. (see figure 12) repetitive rating; pulse width limited by max. junction temperature. ( see fig. 11 ) pulse width 300s; duty cycle 2%. this is applied for i-pak, l s of d-pak is measured between lead and center of die contact i sd 6.0a, di/dt 210a/s, v dd v (br)dss , t j 175c notes: parameter min. typ. max. units conditions v (br)dss drain-to-source breakdown voltage 55 CCC CCC v v gs = 0v, i d = 250a ? v (br)dss / ? t j breakdown voltage temp. coefficient CCC 0.056 CCC v/c reference to 25c, i d = 1ma CCC CCC 0.14 v gs = 10v, i d = 6a CCC CCC 0.21 v gs = 4.5v, i d = 5a v gs(th) gate threshold voltage 1.0 CCC CCC v v ds = v gs , i d = 250a g fs forward transconductance 3.1 CCC CCC s v ds = 25v, i d = 6a CCC CCC 25 a v ds = 55v, v gs = 0v CCC CCC 250 v ds = 55v, v gs = 0v, t j = 150c gate-to-source forward leakage CCC CCC 100 na v gs = 16v gate-to-source reverse leakage CCC CCC -100 v gs = -16v q g total gate charge CCC CCC 7.9 i d = 6a q gs gate-to-source charge CCC CCC 1.4 nc v ds = 44v q gd gate-to-drain ("miller") charge CCC CCC 4.4 v gs = 5.0v, see fig. 6 and 13 t d(on) turn-on delay time CCC 6.5 CCC v dd = 28v t r rise time CCC 47 CCC ns i d = 6a t d(off) turn-off delay time CCC 12 CCC r g = 6.2 ?, v gs = 5.0v t f fall time CCC 23 CCC r d = 4.5 ?, see fig. 10 between lead,6mm (0.25in.) from package and center of die contact c iss input capacitance CCC 265 CCC v gs = 0v c oss output capacitance CCC 80 CCC pf v ds = 25v c rss reverse transfer capacitance CCC 38 CCC ? = 1.0mhz, see fig. 5 electrical characteristics @ t j = 25c (unless otherwise specified) nh i gss s d g l s internal source inductance CCC 7.5 CCC r ds(on) static drain-to-source on-resistance l d internal drain inductance CCC 4.5 CCC i dss drain-to-source leakage current ? downloaded from: http:///

www.irf.com 3 fig 4. normalized on-resistance vs. temperature fig 2. typical output characteristics fig 1. typical output characteristics fig 3. typical transfer characteristics 0.1 1 10 100 2.0 4.0 6.0 8.0 10.0 v = 50v 20s pulse width ds v , gate-to-source voltage (v) i , drain-to-source current (a) gs d t = 25 c j t = 175 c j 0.1 1 10 100 0.1 1 10 100 20s pulse width t = 25 c j top bottom vgs 15v 12v 10v 7.0v 5.0v 4.5v 2.7v 2.0v v , drain-to-source voltage (v) i , drain-to-source current (a) ds d 2.5v 0.1 1 10 100 0.1 1 10 100 20s pulse width t = 175 c j top bottom vgs 15v 12v 10v 7.0v 5.0v 4.5v 2.7v 2.0v v , drain-to-source voltage (v) i , drain-to-source current (a) ds d 2.5v -60 -40 -20 0 20 40 60 80 100 120 140 160 180 0.0 0.5 1.0 1.5 2.0 2.5 t , junction temperature ( c) r , drain-to-source on resistance (normalized) j ds(on) v = i = gs d 10v 10a vgs top 15v 10v 5.0v4.5v 3.5v 3.0v 2.7v bottom 2.5v vgs top 15v 10v 5.0v4.5v 3.5v 3.0v 2.7v bottom 2.5v downloaded from: http:///

4 www.irf.com fig 8. maximum safe operating area fig 6. typical gate charge vs. gate-to-source voltage fig 5. typical capacitance vs. drain-to-source voltage fig 7. typical source-drain diode forward voltage 0.1 1 10 100 0.2 0.6 1.0 1.4 1.8 v ,source-to-drain voltage (v) i , reverse drain current (a) sd sd v = 0 v gs t = 25 c j t = 175 c j 0.1 1 10 100 1000 1 10 100 operation in this area limited by r ds(on) single pulse t t = 175 c = 25 c j c v , drain-to-source voltage (v) i , drain current (a) i , drain current (a) ds d 10us 100us 1ms 10ms 0 2 4 6 8 10 0 5 10 15 q , total gate charge (nc) v , gate-to-source voltage (v) g gs for test circuit see figure i = d 13 6 a v = 27v ds v = 44v ds 1 10 100 0 100 200 300 400 500 v , drain-to-source voltage (v) c, capacitance (pf) ds v c c c = = = = 0v, c c c f = 1mhz + c + c c shorted gs iss gs gd , ds rss gd oss ds gd c iss c oss c rss downloaded from: http:///

www.irf.com 5 fig 10a. switching time test circuit v ds 90%10% v gs t d(on) t r t d(off) t f fig 10b. switching time waveforms )
1 0.1 % ) * + , ) + - ) fig 11. maximum effective transient thermal impedance, junction-to-case fig 9. maximum drain current vs. case temperature 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 notes: 1. duty factor d = t / t 2. peak t = p x z + t 1 2 j dm thjc c p t t dm 1 2 t , rectangular pulse duration (sec) thermal response (z ) 1 thjc 0.01 0.02 0.05 0.10 0.20 d = 0.50 single pulse (thermal response) 25 50 75 100 125 150 175 0.0 2.0 4.0 6.0 8.0 10.0 t , case temperature ( c) i , drain current (a) c d downloaded from: http:///

6 www.irf.com q g q gs q gd v g charge d.u.t. v ds i d i g 3ma v gs .3 f 50k ? .2 f 12v current regulator same type as d.u.t. current sampling resistors + -
fig 13b. gate charge test circuit fig 13a. basic gate charge waveform fig 12c. maximum avalanche energy vs. drain current fig 12b. unclamped inductive waveforms fig 12a. unclamped inductive test circuit t p v (br)dss i as r g i as 0.01 ? t p d.u.t l v ds + - v dd driver a 15v 20v 25 50 75 100 125 150 175 0 10 20 30 40 50 60 starting t , junction temperature ( c) e , single pulse avalanche energy (mj) j as i d top bottom 2.4a 5.0a 6.0a ) downloaded from: http:///

www.irf.com 7 p.w. period di/dt diode recovery dv/dt ripple 5% body diode forward drop re-appliedvoltage reverserecovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t. i sd waveform d.u.t. v ds waveform inductor curent d = p. w . period + - + + + - - - fig 14. for n-channel hexfets ) -.)"/$!/0*0!
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international as s e mbled on ww 16, 2001 in the assembly line "a" or note: "p" in as s embly line pos ition example: lot code 1234 this is an irfr120 wi t h as s e mb l y i ndi cates "l ead-f r ee" product (optional) p = des ignat e s le ad-free a = as s e mb l y s i t e code part number we e k 1 6 dat e code ye ar 1 = 2001 rectifier international logo lot code as s e mb l y 34 12 irf r120 116a line a 34 rectifier logo irf r120 12 as s e mb l y lot code ye ar 1 = 2001 dat e code part number we e k 1 6 "p" in assembly line position indicates "l ead- f r ee" qual i fi cati on to the cons umer -l evel p = des ignat e s le ad-free product qualified to the consume r le vel (opt ional) notes: 1. for an automotive qualified version of this part please see http://www.irf.com/product-info/auto/ 2. for the most current drawing please refer to ir website at http://www.irf.com/package/ downloaded from: http:///

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78 line a logo international rectifier or product (opt ional) p = designates lead-free a = as s e mb l y s i t e code irf u120 part number week 19 dat e code ye ar 1 = 2001 rectifier international logo assembly lot code irf u120 56 dat e code part number lot code as s e mb l y 56 78 year 1 = 2001 week 19 119a indicates lead-free" as s embled on ww 19, 2001 in the assembly line "a" note: "p" in as s embly line pos ition example: wi t h as s e mb l y this is an irfu120 lot code 5678 notes: 1. for an automotive qualified version of this part please see http://www.irf.com/product-info/auto/ 2. for the most current drawing please refer to ir website at http://www.irf.com/package/ downloaded from: http:///

10 www.irf.com ir world headquarters: 233 kansas st., el segundo, california 90245, usa tel: (310) 252-7105 tac fax: (310) 252-7903 visit us at www.irf.com for sales contact information 10/2010 data and specifications subject to change without notice. this product has been designed and qualified f or the industrial market. qualification standards can be found on irs web site.

tr 16.3 ( .641 ) 15.7 ( .619 ) 8.1 ( .318 ) 7.9 ( .312 ) 12.1 ( .476 ) 11.9 ( .469 ) feed direction feed direction 16.3 ( .641 ) 15.7 ( .619 ) trr trl notes : 1. controlling dimension : millimeter. 2. all dimensions are shown in millimeters ( inches ). 3. outline conforms to eia-481 & eia-541. notes : 1. outline conforms to eia-481. 16 mm 13 inch downloaded from: http:///

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